Mentor: Yi-Chen Lu | Manager: Anna Goldie | Collaborated with Hao-Hsiang (Thomas) Hsiao.

• Developing GPU-accelerated optimization techniques for AI-driven chip design workflows.

Mentor: Nahmsuk Oh | Manager: Malleswara Gupta | Collaborated with Vishal Khandelwal, Aditya Shiledar, and Sudipto Kundu.

• Designed and implemented GPU-parallel kernel algorithms for LibCell selection in gate sizing, achieving a 38.13x speedup over the 16-core CPU-based Synopsys industrial sizer.
• Integrated the GPU kernels into Synopsys Fusion Compiler, enabling heterogeneous CPU-GPU co-processing for gate sizing; published in the Euro-Par PhD Symposium 2025.

Advised by Bo-Yin Yang, Daniel J. Bernstein, and Tanja Lange.

• Developed GPU-accelerated big-integer multiplication with NVIDIA-level performance for post-quantum cryptosystems.
• Accelerated NTRU and NTRU Prime lattice-based cryptosystems on Cortex-A72 with vectorized polynomial multipliers, achieving up to 6.7x faster multiplications and 7.67x faster key generation compared to state-of-the-art; published in the Indocrypt, 2023.