Enlarging Quantum Circuit Simulation and Analysis with Non-Volatile Memories

I am a fourth-year Ph.D. student in the Department of Electrical and Computer Engineering at UW-Madison, advised by Prof. Tsung-Wei (TW) Huang. I am currently a student researcher at Ricursive Intelligence for Fall 2026. My research focuses on GPU acceleration for compiler optimization and design automation.

I developed XEG, a GPU-parallel e-graph extractor that accelerates e-graph extraction while maintaining high solution quality. Previously, I developed SimPart, a GPU-parallel graph partitioner for logic simulation by integrating disjoint-set and replication-aided strategies, further optimized with conditional CUDA Graphs. I also collaborate with Synopsys to develop GPU-parallel algorithms for gate sizing in an industrial EDA tool.