SimPart: A Simple Yet Effective Replication-aided Partitioning Algorithm for Logic Simulation on GPU

Aug 1, 2025·
Yi-Hua Chung
Yi-Hua Chung
,
Shui Jiang
,
Wan Luan Lee
,
Yanqing Zhang
,
Haoxing Ren
,
Tsung-Yi Ho
,
Tsung-Wei Huang
· 0 min read
Abstract
Replication-aided partitioning (RAP) has recently been introduced to facilitate the design of parallel logic simulation algorithms. By replicating overlapped work, RAP can significantly reduce the cost of inter-thread synchronization. However, the state-of-the-art RAP algorithm, RepCut, relies on time-consuming hypergraph construction and partitioning, where minimizing cut size corresponds to reducing replication. To overcome this runtime challenge, we introduce SimPart, a simple yet highly effective and efficient GPU-parallel replication-aided p artitioner. SimPart tackles the partitioning problem directly without solving another proxy problem and proposes a hybrid strategy that can maximally utilize GPU threads for simulation atop our partitions. Compared to RepCut, SimPart achieves an average speedup of 23x in partitioning and 1.58x in GPU-parallel simulation, while increasing the original graph size by only 0.3%.
Type
Publication
International European Conference on Parallel and Distributed Computing (Euro-Par), Dresden, Germany, 2025
publications
Yi-Hua Chung
Authors
Yi-Hua Chung (she/her)
Ph.D. Student

I am a fourth-year Ph.D. student in the Department of Electrical and Computer Engineering at UW-Madison, advised by Prof. Tsung-Wei (TW) Huang. My research focuses on GPU-accelerated algorithms for compiler optimization, graph partitioning, and design automation applications.

I developed SimPart, a GPU-parallel graph partitioner for logic simulation by integrating disjoint-set and replication-aided strategies, further optimized with conditional CUDA Graphs. I also collaborate with Synopsys to develop GPU-parallel algorithms for gate sizing in an industrial-use EDA tool.