Publications

Yi-Hua Chung, Shui Jiang, Wan Luan Lee, Yanqing Zhang, Haoxing Ren, Tsung-Yi Ho, and Tsung-Wei Huang, “SimPart: A Simple Yet Effective Replication-aided Partitioning Algorithm for Logic Simulation on GPU,“ International European Conference on Parallel and Distributed Computing (Euro-Par), Dresden, Germany, 2025
Yi-Hua Chung, Nahmsuk Oh, Malleswara Gupta Balabhadra Naga Venkata, Aditya Shiledar, Sudipto Kundu, Vishal Khandelwal, and Tsung-Wei Huang, “Accelerating Gate Sizing using GPU,” International European Conference on Parallel and Distributed Computing (Euro-Par) PhD Symposium, Dresden, Germany, 2025
Wan-Luan Lee, Shui Jiang, Dian-Lun Lin, Che Chang, Boyang Zhang, Yi-Hua Chung, Ulf Schlichtmann, Tsung-Yi Ho, and Tsung-Wei Huang, “iG-kway: Incremental k-way Graph Partitioning on GPU,“ ACM/IEEE Design Automation Conference (DAC), San Francisco, CA, 2025
Cheng-Hsiang Chiu, Wan-Luan Lee, Boyang Zhang, Yi-Hua Chung, Che Chang, and Tsung-Wei Huang, “A Task-parallel Pipeline Programming Model with Token Dependency,“ Workshop on Asynchronous Many-Task Systems and Applications (WAMTA), St. Louis, MO, 2025
Shui Jiang, Yi-Hua Chung, Chih-Chun Chang, Tsung-Yi Ho, and Tsung-Wei Huang, “BQSim: GPU-accelerated Batch Quantum Circuit Simulation using Decision Diagram,“ ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Rotterdam, Netherlands, 2025
Boyang Zhang, Che Chang, Cheng-Hsiang Chiu, Dian-Lun Lin, Yang Sui, Chih-Chun Chang, Yi-Hua Chung, Wan-Luan Lee, Zizheng Guo, Yibo Lin, and Tsung-Wei Huang, “iTAP: An Incremental Task Graph Partitioner for Task-parallel Static Timing Analysis,“ IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), Tokyo, Japan, 2025
Che Chang, Boyang Zhang, Cheng-Hsiang Chiu, Dian-Lun Lin, Yi-Hua Chung, Wan-Luan Lee, Zizheng Guo, Yibo Lin, and Tsung-Wei Huang, “PathGen: An Efficient Parallel Critical Path Generation Algorithm,“ IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), Tokyo, Japan, 2025
Chen, Han-Ting, Yi-Hua Chung, Vincent Hwang, and Bo-Yin Yang. “Algorithmic Views of Vectorized Polynomial Multipliers–NTRU (2023).“ Indocrypt, 2023
Chen, Han-Ting, Yi-Hua Chung, Vincent Hwang, Chi-Ting Liu, and Bo-Yin Yang. “Algorithmic Views of Vectorized Polynomial Multipliers for NTRU and NTRU Prime (Long Paper).“ Cryptology ePrint Archive, Paper 2023/541. 2023
Yi-Hua Chung. 2022. Enlarging quantum circuit simulation and analysis with non-volatile memories. Master’s thesis. National Taiwan University, No. 1, Sec. 4, Roosevelt Rd., Taipei 106216, Taiwan (R.O.C.)
Chung, Yi-Hua, Cheng-Jhih Shih, and Shih-Hao Hung. “Accelerating simulated quantum annealing with GPU and tensor cores.“ In International Conference on High Performance Computing, pp. 174-191. Cham: Springer International Publishing, 2022
Chung, Yi-Hua, Huang Jun-Fu, Hu Yuan-Chen, and Huang Chen-Kang. “Development of a Small Intelligent Weather Station for Agricultural Applications.“ Advances in Technology Innovation 6, no. 2 (2021): 74.
- [Best Paper Award] in the 9th international multi-conference on Engineering and Technology Innovation, 2020